605 search results - page 121 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
RTSS
2003
IEEE
13 years 10 months ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
VISUALIZATION
1996
IEEE
13 years 9 months ago
1996
IEEE
A general volume rendering technique is described that efficiently produces images of excellent quality from data defined over irregular grids having a wide variety of formats. Re...
FPGA
2008
ACM
13 years 7 months ago
2008
ACM
We present HybridOS, a set of operating system extensions for supporting fine-grained reconfigurable accelerators integrated with general-purpose computing platforms. HybridOS spe...
MASCOTS
2010
13 years 6 months ago
2010
Subtle implementation errors or mis-configurations in complex Internet services may lead to performance degradations without causing failures. These undiscovered performance anomal...
AAAI
1998
13 years 6 months ago
1998
We have built a set of integrated AI systems (called conversation machines) to enable transaction processing over the telephone for limited domains like stock trading and banking....