3 search results - page 1 / 1 » Signal waveform characterization in RLC trees |
ISCAS
1999
IEEE
13 years 9 months ago
1999
IEEE
- Closed form solutions for the 50% delay, rise time, overshoot characteristics, and settling time of signals in an RLC tree are presented. These solutions have the same accuracy c...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Based on a Fourier series analysis, an analytic interconnect model is presented which is suitable for periodic signals, such as a clock signal. In this model, the far end time ...
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...