48 search results - page 3 / 10 » Simplifying concurrent algorithms by exploiting hardware tra... |
ASPLOS
2011
ACM
12 years 9 months ago
2011
ACM
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
ASPLOS
2012
ACM
12 years 1 months ago
2012
ACM
Multithreaded programs often suffer from synchronization bugs such as atomicity violations and deadlocks. These bugs arise from complicated locking strategies and ad hoc synchroni...
ICS
2009
Tsinghua U.
13 years 3 months ago
2009
Tsinghua U.
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...
DATE
2007
IEEE
13 years 12 months ago
2007
IEEE
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
PPOPP
2009
ACM
14 years 6 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...