13 search results - page 3 / 3 » Simulation and modeling of the effect of substrate conductiv... |
TVLSI
2002
13 years 4 months ago
2002
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
VLSID
2000
IEEE
13 years 9 months ago
2000
IEEE
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
TCAD
2002
13 years 5 months ago
2002
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...