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DATE
2009
IEEE
163views Hardware» more  DATE 2009»
13 years 11 months ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
ISCA
2003
IEEE
150views Hardware» more  ISCA 2003»
13 years 10 months ago
Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...
Dan Ernst, Andrew Hamel, Todd M. Austin
WCNC
2010
IEEE
13 years 8 months ago
DCP-EW: Distributed Congestion-Control Protocol for Encrypted Wireless Networks
Abstract— VCP suffers from a relatively low speed of convergence and exhibits biased fairness in moderate bandwidth high delay networks due to utilizing an insufficient amount o...
Xiaolong Li, Homayoun Yousefi'zadeh
SIGMETRICS
2011
ACM
237views Hardware» more  SIGMETRICS 2011»
12 years 7 months ago
Analysis of DCTCP: stability, convergence, and fairness
Cloud computing, social networking and information networks (for search, news feeds, etc) are driving interest in the deployment of large data centers. TCP is the dominant Layer 3...
Mohammad Alizadeh, Adel Javanmard, Balaji Prabhaka...