25 search results - page 5 / 5 » Simultaneous optimization of memory configuration and code a... |
IEEEINTERACT
2003
IEEE
13 years 11 months ago
2003
IEEE
For call intensive programs, function calls are major bottlenecks during program execution since they usually force register contents to be spilled into memory. Such register to m...
ESTIMEDIA
2005
Springer
13 years 11 months ago
2005
Springer
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
ESTIMEDIA
2008
Springer
13 years 7 months ago
2008
Springer
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
CODES
2008
IEEE
14 years 7 days ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...