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FPGA
2005
ACM
105views FPGA» more  FPGA 2005»
13 years 10 months ago
Soft error rate estimation and mitigation for SRAM-based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
IOLTS
2005
IEEE
163views Hardware» more  IOLTS 2005»
13 years 10 months ago
Modeling Soft-Error Susceptibility for IP Blocks
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
Robert C. Aitken, Betina Hold
JSAC
2000
96views more  JSAC 2000»
13 years 4 months ago
Joint equalization and interference suppression for high data rate wireless systems
Enhanced Data Rates for Global Evolution (EDGE) is currently being standardized as an evolution of GSM in Europe and of IS-136 in the United States as an air interface for high spe...
Sirikiat Lek Ariyavisitakul, Jack H. Winters, Nels...
TCOM
2010
115views more  TCOM 2010»
13 years 3 months ago
New designs for bit-interleaved coded modulation with hard-decision feedback iterative decoding
—Bit-interleaved coded modulation (BICM) is often the method of choice for multilevel transmission over fading channels. If relatively simple forward error-correction (FEC) codes...
Alireza Kenarsari-Anhari, Lutz H.-J. Lampe