39 search results - page 6 / 8 » Software thermal management of dram memory for multicore sys... |
ISCA
2000
IEEE
13 years 10 months ago
2000
IEEE
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
CASES
2010
ACM
13 years 3 months ago
2010
ACM
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
POPL
2010
ACM
13 years 4 months ago
2010
ACM
S-NET is a declarative coordination language and component technology aimed at modern multi-core/many-core architectures and systems-on-chip. It builds on the concept of stream pr...
CC
2008
Springer
13 years 7 months ago
2008
Springer
Heterogeneous multi-core and streaming architectures such as the GPU, Cell, ClearSpeed, and Imagine processors have better power/ performance ratios and memory bandwidth than tradi...
ASPLOS
2011
ACM
12 years 9 months ago
2011
ACM
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...