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» Software-based instruction caching for embedded processors
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CASES
2008
ACM
13 years 6 months ago
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization
While technology advances have made MPSoCs a standard architecture for embedded systems, their applicability is increasingly being challenged by dramatic increases in the amount o...
Chengmo Yang, Alex Orailoglu
SP
2010
IEEE
158views Security Privacy» more  SP 2010»
13 years 8 months ago
Tamper Evident Microprocessors
Abstract—Most security mechanisms proposed to date unquestioningly place trust in microprocessor hardware. This trust, however, is misplaced and dangerous because microprocessors...
Adam Waksman, Simha Sethumadhavan