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» Some experiments about wave pipelining on FPGA's
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TVLSI
1998
99views more  TVLSI 1998»
13 years 4 months ago
Some experiments about wave pipelining on FPGA's
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
Eduardo I. Boemo, Sergio López-Buedo, Juan ...
CHES
2007
Springer
136views Cryptology» more  CHES 2007»
13 years 11 months ago
CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method
The hardness of the integer factorization problem assures the security of some public-key cryptosystems including RSA, and the number field sieve method (NFS), the most efficient ...
Tetsuya Izu, Jun Kogure, Takeshi Shimoyama
FPL
2006
Springer
96views Hardware» more  FPL 2006»
13 years 8 months ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling
JUCS
2007
124views more  JUCS 2007»
13 years 4 months ago
Pipeline-scheduling Simulator for Educational Purpose
: This paper presents a project that provides both, to professors and to students, a tool that is useful for studying, teaching and learning how pipelines work and how they can be ...
José M. Chaves-González, Miguel A. V...
FDTC
2011
Springer
267views Cryptology» more  FDTC 2011»
12 years 4 months ago
An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs
Abstract—The literature about fault analysis typically describes fault injection mechanisms, e.g. glitches and lasers, and cryptanalytic techniques to exploit faults based on som...
Josep Balasch, Benedikt Gierlichs, Ingrid Verbauwh...