Sciweavers

Share
38 search results - page 1 / 8
» Speculation Techniques for Improving Load Related Instructio...
Sort
View
ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
9 years 10 months ago
Speculation Techniques for Improving Load Related Instruction Scheduling
State of the art microprocessors achieve high performance by executing multiple instructions per cycle. In an out-oforder engine, the instruction scheduler is responsible for disp...
Adi Yoaz, Mattan Erez, Ronny Ronen, Stéphan...
HPCA
1999
IEEE
9 years 10 months ago
Improving CC-NUMA Performance Using Instruction-Based Prediction
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
Stefanos Kaxiras, James R. Goodman
JILP
2000
79views more  JILP 2000»
9 years 5 months ago
A Comparative Survey of Load Speculation Architectures
Load latency remains a signi cant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Predi...
Brad Calder, Glenn Reinman
ICS
1999
Tsinghua U.
9 years 10 months ago
Classifying load and store instructions for memory renaming
Memory operations remain a signi´Čücant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
Glenn Reinman, Brad Calder, Dean M. Tullsen, Gary ...
PLDI
2003
ACM
9 years 11 months ago
A compiler framework for speculative analysis and optimizations
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, ...
books