37 search results - page 1 / 8 » Speculation Techniques for Improving Load Related Instructio... |
ISCA
1999
IEEE
13 years 8 months ago
1999
IEEE
State of the art microprocessors achieve high performance by executing multiple instructions per cycle. In an out-oforder engine, the instruction scheduler is responsible for disp...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
JILP
2000
13 years 4 months ago
2000
Load latency remains a signi cant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Predi...
ICS
1999
Tsinghua U.
13 years 8 months ago
1999
Tsinghua U.
Memory operations remain a significant bottleneck in dynamically scheduled pipelined processors, due in part to the inability to statically determine the existence of memory addr...
PLDI
2003
ACM
13 years 9 months ago
2003
ACM
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...