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» Speculative Parallel Threading Architecture and Compilation
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ICPPW
2005
IEEE
13 years 10 months ago
Speculative Parallel Threading Architecture and Compilation
Thread-level speculation is a technique that brings thread-level parallelism beyond the data-flow limit by executing a piece of code ahead of time speculatively before all its inp...
Xiao-Feng Li, Zhao-Hui Du, Chen Yang, Chu-Cheow Li...
LCPC
2001
Springer
13 years 9 months ago
The Structure of a Compiler for Explicit and Implicit Parallelism
Abstract. We describe the structure of a compilation system that generates code for processor architectures supporting both explicit and implicit parallel threads. Such architectur...
Seon Wook Kim, Rudolf Eigenmann
PPOPP
2003
ACM
13 years 10 months ago
Compiler support for speculative multithreading architecture with probabilistic points-to analysis
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Ro...
PLDI
2005
ACM
13 years 10 months ago
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices
Speculative parallelization can provide significant sources of additional thread-level parallelism, especially for irregular applications that are hard to parallelize by conventio...
Carlos García Quiñones, Carlos Madri...
ICS
2001
Tsinghua U.
13 years 9 months ago
Multiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Ei...