3 search results - page 1 / 1 » Speculative Trace Scheduling in VLIW Processors |
ICCD
2002
IEEE
14 years 1 months ago
2002
IEEE
VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the applicatio...
IPPS
2000
IEEE
13 years 9 months ago
2000
IEEE
In a machine that follows the dynamically trace scheduled VLIW (DTSVLIW) architecture, VLIW instructions are built dynamically through an algorithm that can be implemented in hard...
JUCS
2000
13 years 4 months ago
2000
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...