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» Speeding Up Evaluation of Powers and Monomials
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GLVLSI
2005
IEEE
152views VLSI» more  GLVLSI 2005»
13 years 10 months ago
A high speed and leakage-tolerant domino logic for high fan-in gates
Robustness of high fan-in domino circuits is degraded by technology scaling due to exponential increase in leakage. In this paper, we propose a new domino circuit for high fan-in ...
Farshad Moradi, Hamid Mahmoodi-Meimand, Ali Peirav...
PVLDB
2010
166views more  PVLDB 2010»
13 years 3 months ago
Complex Event Detection at Wire Speed with FPGAs
Complex event detection is an advanced form of data stream processing where the stream(s) are scrutinized to identify given event patterns. The challenge for many complex event pr...
Louis Woods, Jens Teubner, Gustavo Alonso
VTC
2008
IEEE
145views Communications» more  VTC 2008»
13 years 11 months ago
Combined Effect of Inter-Path Interference Cancellation And Random Transmit Power Control on DS-CDMA Packet Mobile Communication
— In mobile communication systems, high speed packet data services are demanded. In the high speed data transmission, throughput degrades severely due to severe inter-path interf...
Eisuke Kudoh, Haruki Ito, ZhiSen Wang, Fumiyuki Ad...
ASAP
2009
IEEE
157views Hardware» more  ASAP 2009»
14 years 2 months ago
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
The advent of the mobile age has heavily changed the requirements of today’s communication devices. Data transmission over interference-prone wireless channels requires addition...
Andreas Genser, Christian Bachmann, Christian Steg...
HIPEAC
2007
Springer
13 years 9 months ago
Sunflower :  Full-System, Embedded Microarchitecture Evaluation
Abstract. This paper describes Sunflower, a full-system microarchitectural evaluation environment for embedded computing systems. The environment enables detailed microarchitectura...
Phillip Stanley-Marbell, Diana Marculescu