328 search results - page 65 / 66 » Static performance prediction of skeletal parallel programs |
OOPSLA
2005
Springer
13 years 10 months ago
2005
Springer
It is now well established that the device scaling predicted by Moore’s Law is no longer a viable option for increasing the clock frequency of future uniprocessor systems at the...
ICS
1999
Tsinghua U.
13 years 9 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
CLUSTER
2003
IEEE
13 years 10 months ago
2003
IEEE
We further increase the efficiency of Java RMI programs. Where other optimizing re-implementations of RMI use pre-processors to create stubs and skeletons and to create class spe...
CF
2005
ACM
13 years 7 months ago
2005
ACM
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...