CF 2005 - PDF Preprint Papers

CF 2005 Conference On Computing Frontiers

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CF
2005
ACM

166views Applied Computing» more CF 2005»

A case for a working-set-based memory hierarchy

13 years 6 months ago

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Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...

Steve Carr, Soner Önder

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Id	Views	Title	Status

1	166	A case for a working-set-based memory hierarchy	claim
2	135	Dynamic loop pipelining in data-driven architectures	claim
3	133	Sparse matrix storage revisited	claim
4	133	Evaluation of extended dictionary-based static code compression schemes	claim
5	130	SPANIDS: a scalable network intrusion detection loadbalancer	claim
6	128	Owl: next generation system monitoring	claim
7	128	An efficient wakeup design for energy reduction in high-performance superscalar processors	claim
8	124	Drowsy region-based caches: minimizing both dynamic and static power dissipation	claim
9	124	Grid result checking	claim
10	109	Exploiting temporal locality in drowsy cache policies	claim
11	103	Exploiting processor groups to extend scalability of the GA shared memory programming model	claim
12	100	Dynamic run-time architecture techniques for enabling continuous optimization	claim
13	99	Balancing clustering-induced stalls to improve performance in clustered processors	claim
14	99	Marching-pixels: a new organic computing paradigm for smart sensor processor arrays	claim
15	98	Communication and security extensions for a ubiquitous mobile agent system (UbiMAS)	claim
16	98	Controlling leakage power with the replacement policy in slumberous caches	claim
17	95	Matrix register file and extended subwords: two techniques for embedded media processors	claim
18	95	Skewed caches from a low-power perspective	claim
19	87	On the energy-efficiency of speculative hardware	claim
20	86	Reducing misspeculation overhead for module-level speculative execution	claim
21	83	Time, space, and energy in reversible computing	claim
22	81	Power and performance optimization at the system level	claim
23	78	Reversible logic for supercomputing	claim

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