19 search results - page 4 / 4 » Static power minimization in current-mode circuits |
DAC
2003
ACM
14 years 6 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
IJCSS
2007
13 years 5 months ago
2007
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
VLSID
2006
IEEE
13 years 11 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
DATE
2008
IEEE
14 years 3 days ago
2008
IEEE
With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperat...