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» Static timing analysis using backward signal propagation
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VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 5 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
WINET
2010
91views more  WINET 2010»
13 years 3 months ago
Route duration modeling for mobile ad-hoc networks
In this paper, we present a model that estimates the time duration of routes formed by several intermediate nodes in mobile multi-hop ad-hoc networks. First, we analyze a 3-node ro...
Michael Pascoe-Chalke, Javier Gomez, Victor Rangel...
PPOPP
2005
ACM
13 years 10 months ago
Teleport messaging for distributed stream programs
In this paper, we develop a new language construct to address one of the pitfalls of parallel programming: precise handling of events across parallel components. The construct, te...
William Thies, Michal Karczmarek, Janis Sermulins,...