61 search results - page 2 / 13 » Statistical Leakage and Timing Optimization for Submicron Pr... |
ICCD
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
DATE
2008
IEEE
13 years 12 months ago
2008
IEEE
Shrinking feature sizes and process variations are of increasing concern in modern technology. It is urgent that we develop statistical interconnect timing models which are harmon...
FTEDA
2006
13 years 5 months ago
2006
As IC technologies scale to finer feature sizes, it becomes increasingly difficult to control the relative process variations. The increasing fluctuations in manufacturing process...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
ICCAD
2005
IEEE
14 years 2 months ago
2005
IEEE
— Process variations cause significant timing uncertainty and yield degradation in deep sub-micron technologies. A solution to counter timing uncertainty is post-silicon clock t...