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ISCAS
2005
IEEE
123views Hardware» more  ISCAS 2005»
13 years 10 months ago
Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluations
Abstract— In this paper, we propose a sub-operation parallelism optimization algorithm in SIMD processor synthesis. Given an initial assembly code and timing constraints, our alg...
Nozomu Togawa, Hideki Kawazu, Jumpei Uchida, Yuich...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
13 years 11 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
CLUSTER
2007
IEEE
13 years 11 months ago
Balancing productivity and performance on the cell broadband engine
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
Sadaf R. Alam, Jeremy S. Meredith, Jeffrey S. Vett...
IPPS
2008
IEEE
13 years 11 months ago
High performance MPEG-2 software decoder on the cell broadband engine
The Sony-Toshiba-IBM Cell Broadband Engine is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD coprocessing units (SPEs) ...
David A. Bader, Sulabh Patel
IJPP
2010
137views more  IJPP 2010»
13 years 3 months ago
Parallel Option Price Valuations with the Explicit Finite Difference Method
Abstract. We show how computations such as those involved in American or European-style option price valuations with the explicit finite difference method can be performed in par...
Alexandros V. Gerbessiotis