Abstract. With the emergence of multi-core CPU (or Chip-level MultiProcessor -CMP-), it is essential to develop techniques that capitalize on CMP's advantages to speed up very...
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
Abstract. In this work we study the dynamic one-to-one communication problem in energy- and capacity-constrained wireless ad-hoc networks. The performance of such networks is evalu...
Christos A. Papageorgiou, Panagiotis C. Kokkinos, ...
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
Rohit Sunkam Ramanujam, Vassos Soteriou, Bill Lin,...
Mobility is the distinguishing feature of vehicular networks, affecting the evolution of network connectivity over space and time in a unique way. Connectivity dynamics, in turn, ...