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» SyCE: An Integrated Environment for System Design in SystemC
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SUTC
2010
IEEE
13 years 3 months ago
Transaction-Level Modeling for Sensor Networks Using SystemC
—As sensor networks are finding widespread use across many applications, designers increasingly must not only focus on application development, but also on sensor network optimiz...
Jeff Hiner, Ashish Shenoy, Roman L. Lysecky, Susan...
MSE
2003
IEEE
92views Hardware» more  MSE 2003»
13 years 10 months ago
On simulating the IP Market Dynamics in an Academic Environment Using SystemC
As SoC (System-on-a-chip) methodology emerges, IP (Intellectual Property) development and integration will play a major role in the hightech industry. To prepare for this future t...
Ghaiyyur Quraishi, Ravi Shankar
FDL
2005
IEEE
13 years 10 months ago
An HW/SW Co-design Environment based on UML and SystemC
This paper outlines some fundamental concepts for the development of a system design framework based on standard notations and common CASE tools. We describe an environment for HW...
Elvinia Riccobene, Patrizia Scandurra, Alberto Ros...
FDL
2005
IEEE
13 years 10 months ago
Incorporating SystemC in Analog/Mixed-Signal Design Flow
In today’s flows, there is still a gap between system level description and hardware implementation, especially for analog/RF building blocks. SystemC-AMS or co-simulations have...
Patrick Birrer, Walter Hartong
DATE
2003
IEEE
119views Hardware» more  DATE 2003»
13 years 10 months ago
IPSIM: SystemC 3.0 Enhancements for Communication Refinement
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
Marcello Coppola, Stephane Curaba, Miltos D. Gramm...