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POPL
2010
ACM
14 years 2 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
ESEC
1999
Springer
13 years 9 months ago
Comparison Checking: An Approach to Avoid Debugging of Optimized Code
Abstract. We present a novel approach to avoid the debugging of optimized code through comparison checking. In the technique presented, both the unoptimized and optimized versions ...
Clara Jaramillo, Rajiv Gupta, Mary Lou Soffa
ASPLOS
2008
ACM
13 years 7 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
13 years 8 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
IESS
2007
Springer
158views Hardware» more  IESS 2007»
13 years 11 months ago
Dynamic Software Update of Resource-Constrained Distributed Embedded Systems
Changing demands, software evolution, and bug fixes require the possibility to update applications as well as system software of embedded devices. Systems that perform updates of ...
Meik Felser, Rüdiger Kapitza, Jürgen Kle...