106 search results - page 3 / 22 » Symbolic Debugging Scheme for Optimized Hardware and Softwar... |
IPPS
1997
IEEE
13 years 9 months ago
1997
IEEE
Barrier synchronization is a crucial operation for parallel systems. Many schemes have been proposed in the literature to achieve fast barrier synchronization through software, ha...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
Developing an optimizing compiler for a newly proposed architecture is extremely difficult when there is only a simulator of the machine available. Designing such a compiler requ...
ISCAS
2003
IEEE
13 years 11 months ago
2003
IEEE
Maximum Likelihood estimation theory can be used to develop optimal timing recovery schemes for digital communication systems. Tunable digital interpolation filters are commonly ...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
- A noble model-based programming environment of embedded software for MPSoC is proposed. By defining a common intermediate code (CIC), it separates modeling of the software and im...
DCC
2007
IEEE
14 years 5 months ago
2007
IEEE
Instruction and data address traces are widely used by computer designers for quantitative evaluations of new architectures and workload characterization, as well as by software de...