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VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
13 years 2 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
VLSID
2009
IEEE
115views VLSI» more  VLSID 2009»
14 years 5 months ago
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
Prabhat Mishra, Mingsong Chen
IJCAI
2001
13 years 6 months ago
Solving Non-Boolean Satisfiability Problems with Stochastic Local Search
Much excitement has been generated by the success of stochastic local search procedures at finding solutions to large, very hard satisfiability problems. Many of the problems on wh...
Alan M. Frisch, Timothy J. Peugniez
CAV
2007
Springer
212views Hardware» more  CAV 2007»
13 years 8 months ago
A Tutorial on Satisfiability Modulo Theories
Abstract. Solvers for satisfiability modulo theories (SMT) check the satisfiability of first-order formulas containing operations from various theories such as the Booleans, bit-ve...
Leonardo Mendonça de Moura, Bruno Dutertre,...
IFIP
2001
Springer
13 years 9 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre