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» Synthesis and Implementation of RAM-Based Finite State Machi...
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ICCTA
2007
IEEE
13 years 9 months ago
Register Sharing Verification During Data-Path Synthesis
The variables of the high-level specifications and the automatically generated temporary variables are mapped on to the data-path registers during data-path synthesis phase of hig...
Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sa...
ICCAD
2002
IEEE
110views Hardware» more  ICCAD 2002»
14 years 2 months ago
Whirlpool PLAs: a regular logic structure and their synthesis
 A regular circuit structure called a Whirlpool PLA (WPLA) is proposed. It is suitable for the implementation of finite state machines as well as combinational logic. A WPLA is ...
Fan Mo, Robert K. Brayton
CSREAESA
2008
13 years 7 months ago
BIST-BASED Group Testing for Diagnosis of Embedded FPGA Cores
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
Alireza Sarvi, Carthik A. Sharma, Ronald F. DeMara
VCIP
2000
124views Communications» more  VCIP 2000»
13 years 6 months ago
Rendering of 3D-wavelet-compressed concentric mosaic scenery with progressive inverse wavelet synthesis (PIWS)
The concentric mosaics offer a quick solution to the construction and navigation of a virtual environment. To reduce the vast data amount of the concentric mosaics, a compression ...
Yunnan Wu, Lin Luo, Jin Li, Ya-Qin Zhang
ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
13 years 9 months ago
An efficient procedure for the synthesis of fast self-testable controller structures
The BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for test purposes. This leads to some seri...
Sybille Hellebrand, Hans-Joachim Wunderlich