Sciweavers

115 search results - page 23 / 23
» Synthesis of Asynchronous Hardware from Petri Nets
Sort
View
DAC
2003
ACM
14 years 5 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
13 years 6 months ago
Making fast buffer insertion even faster via approximation techniques
Abstract— As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing...
Zhuo Li, Cliff C. N. Sze, Charles J. Alpert, Jiang...
ICECCS
1995
IEEE
100views Hardware» more  ICECCS 1995»
13 years 8 months ago
POSD-a notation for presenting complex systems of processes
When trying to describe the behaviour of large systems, such as the business processes of large enterprises, we often adopt diagramming techniques based on derivatives of data flo...
Peter Henderson, Graham D. Pratten
VALUETOOLS
2006
ACM
164views Hardware» more  VALUETOOLS 2006»
13 years 10 months ago
Analysis of Markov reward models using zero-suppressed multi-terminal BDDs
High-level stochastic description methods such as stochastic Petri nets, stochastic UML statecharts etc., together with specifications of performance variables (PVs), enable a co...
Kai Lampka, Markus Siegle
LCTRTS
2010
Springer
13 years 2 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla