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» Synthesis of Operation-Centric Hardware Descriptions
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ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
13 years 10 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...
ICCAD
1994
IEEE
137views Hardware» more  ICCAD 1994»
13 years 10 months ago
Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints
We present in this paper a novel control synthesis technique for system-level specifications that are better described as a set of concurrent synchronous descriptions, their synch...
Claudionor José Nunes Coelho Jr., Giovanni ...
ICCAD
1997
IEEE
117views Hardware» more  ICCAD 1997»
13 years 10 months ago
Decomposition of timed decision tables and its use in presynthesis optimizations
Presynthesis optimizations transform a behavioral HDL description into an optimized HDL description that results in improved synthesis results. In this paper we introduce the decom...
Jian Li, Rajesh K. Gupta
ICCD
1992
IEEE
126views Hardware» more  ICCD 1992»
13 years 10 months ago
High-Level State Machine Specification and Synthesis
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
ISSS
1995
IEEE
98views Hardware» more  ISSS 1995»
13 years 9 months ago
On the use of VHDL-based behavioral synthesis for telecom ASIC design
higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as...
Mark Genoe, Paul Vanoostende, Geert van Wauwe