4 search results - page 1 / 1 » Synthesis of customized loop caches for core-based embedded ... |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
ISSS
2002
IEEE
13 years 9 months ago
2002
IEEE
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
GLVLSI
2007
IEEE
13 years 8 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...