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» Synthesizable High Level Hardware Descriptions
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CASES
2003
ACM
13 years 11 months ago
AES and the cryptonite crypto processor
CRYPTONITE is a programmable processor tailored to the needs of crypto algorithms. The design of CRYPTONITE was based on an in-depth application analysis in which standard crypto ...
Dino Oliva, Rainer Buchty, Nevin Heintze
WSC
1998
13 years 7 months ago
SEAMS: Simulation Environment for VHDL-AMS
VHDL-AMS is an Analog and Mixed-Signal extension to the Very High Speed Integrated Circuit Hardware Description Language (VHDL). With the standardization of VHDL-AMS, capable and ...
Peter Frey, Kathiresan Nellayappan, Vasudevan Sahn...
IGARSS
2010
13 years 3 months ago
SMOS L1 algorithms
The Level 1 Processing of SMOS transforms the data acquired by MIRAS (Microwave Imaging Radiometer with Aperture Synthesis) into geolocated TOA Brightness Temperatures, providing ...
Antonio Gutierrez, Jose Barbosa, Nuno Catarino, Ri...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
14 years 5 days ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
13 years 10 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez