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    ISSS
    2002
    IEEE
    109views Hardware» more  ISSS 2002»
    System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory
    13 years 9 months ago
    System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory
    Download  moss.csc.ncsu.edu
    Abhijit Chatterjee, Peeter Ellervee, Vincent John ...
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    CODES
    2005
    IEEE
    134views Software Engineering» more  CODES 2005»
    Power-smart system-on-chip architecture for embedded cryptosystems
    13 years 10 months ago
    Power-smart system-on-chip architecture for embedded cryptosystems
    Download  delivery.acm.org
    In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
    Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
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