65 search results - page 2 / 13 » System Level Simulation of Autonomic SoCs with TAPES |
DELTA
2004
IEEE
13 years 9 months ago
2004
IEEE
Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or act...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
SDL
2003
13 years 6 months ago
2003
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
CODES
2005
IEEE
13 years 11 months ago
2005
IEEE
Majority of existing works on system level power estimation have focused on the processor, while there are very few that address power consumption of peripherals in a SoC. With th...
ICAC
2005
IEEE
13 years 11 months ago
2005
IEEE
System administrators of today’s high performance computing systems are generally responsible for managing the large amounts of data traffic and archival querying that mass stor...