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ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 2 months ago
Requirements and Concepts for Transaction Level Assertions
— The latest development of hardware design and ation methodologies shows a trend towards abstraction levels higher than RTL, referred to as transaction level (TL). Transaction l...
Wolfgang Ecker, Volkan Esen, Michael Hull, Thomas ...
DATE
2008
IEEE
168views Hardware» more  DATE 2008»
14 years 7 days ago
Cycle-approximate Retargetable Performance Estimation at the Transaction Level
This paper presents a novel cycle-approximate performance estimation technique for automatically generated transaction level models (TLMs) for heterogeneous multicore designs. The...
Yonghyun Hwang, Samar Abdi, Daniel Gajski
CAISE
2004
Springer
13 years 11 months ago
Multi-Paradigm Process Management
Automation and integration of business processes are at the heart of contemporary enterprise systems. In the pursuit of this goal, process automation technology is employed at vary...
Michael zur Muehlen, Michael Rosemann
PLDI
2009
ACM
14 years 17 days ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
PPOPP
2009
ACM
14 years 17 days ago
NePalTM: design and implementation of nested parallelism for transactional memory systems
Abstract. Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing c...
Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Ta...