169 search results - page 1 / 34 » System level memory optimization for hardware-software co-de... |
TC
2010
12 years 12 months ago
2010
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
FPL
2007
Springer
13 years 11 months ago
2007
Springer
We introduce a new execution model for orchestrating the interaction between the conventional processor and the reconfigurable compute unit in adaptive computer systems. We then ...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
ERSA
2006
13 years 6 months ago
2006
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
GECCO
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. The current trend in Embedded Systems (ES) design is moving towards the integration of increasingly complex applications on a single chip. An Embedded System has to satis...