30 search results - page 3 / 6 » Tableaux and Model Checking for Memory Logics |
SPIN
2007
Springer
13 years 12 months ago
2007
Springer
d Abstract) Luboˇs Brim and Jiˇr´ı Barnat Faculty of Informatics, Masaryk University, Brno, Czech Republic With the increase in the complexity of computer systems, it becomes e...
ENTCS
2007
13 years 5 months ago
2007
Bounded Model Checking (BMC) is a successful refutation method to detect errors in not only circuits and other binary systems but also in systems with more complex domains like ti...
GLVLSI
2006
IEEE
13 years 12 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
IPPS
2003
IEEE
13 years 11 months ago
2003
IEEE
This paper investigates a complexity-effective technique for verifying a highly distributed directory-based cache coherence protocol. We develop a novel approach called “witnes...
CEC
2008
IEEE
14 years 8 days ago
2008
IEEE
Abstract— Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulae on the program variables. Most o...