119 search results - page 1 / 24 » Targeting Tiled Architectures in Design Exploration |
IPPS
2003
IEEE
13 years 9 months ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
FPGA
2003
ACM
13 years 9 months ago
2003
ACM
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
ISSS
2002
IEEE
13 years 9 months ago
2002
IEEE
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
ISCA
2006
IEEE
13 years 4 months ago
2006
IEEE
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...