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» Techniques for Transient Fault Sensitivity Analysis and Redu...
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DFT
2003
IEEE
106views VLSI» more  DFT 2003»
13 years 10 months ago
Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits
Transient faults in VLSI circuits could lead to disastrous consequences. With technology scaling, circuits are becoming increasingly vulnerable to transient faults. This papers pr...
Atul Maheshwari, Israel Koren, Wayne Burleson
ISQED
2002
IEEE
111views Hardware» more  ISQED 2002»
13 years 9 months ago
Incorporating Fault Tolerance in Analog-to-Digital Converters (ADCs)
The reliability of ADCs used in highly critical systems can be increased by applying a two-step procedure starting with sensitivity analysis followed by redesign. The sensitivity ...
Mandeep Singh, Israel Koren
ICCAD
2008
IEEE
106views Hardware» more  ICCAD 2008»
14 years 1 months ago
Process variability-aware transient fault modeling and analysis
– Due to reduction in device feature size and supply voltage, the sensitivity of digital systems to transient faults is increasing dramatically. As technology scales further, the...
Natasa Miskov-Zivanov, Kai-Chiang Wu, Diana Marcul...
ISCAS
2003
IEEE
90views Hardware» more  ISCAS 2003»
13 years 10 months ago
A reduction technique of large scale RCG interconnects in complex frequency domain
High frequency digital LSIs usually consist of many subcircuits coupled with multi-conductor interconnects embedded in the substrate. They sometimes cause serious problems of the ...
Yoshihiro Yamagami, Yoshifumi Nishio, Atsumi Hatto...
ISQED
2007
IEEE
135views Hardware» more  ISQED 2007»
13 years 11 months ago
MARS-S: Modeling and Reduction of Soft Errors in Sequential Circuits
Due to the shrinking of feature size and reduction in supply voltages, nanoscale circuits have become more susceptible to radiation induced transient faults. In this paper, we use...
Natasa Miskov-Zivanov, Diana Marculescu