46 search results - page 1 / 10 » Techniques for Verifying Superscalar Microprocessors |
DAC
1996
ACM
13 years 9 months ago
1996
ACM
Burch and Dill [3] described an automatic method for verifying a pipelined processor against its instruction setarchitecture(ISA). We describethree techniquesfor improving this me...
TVLSI
2002
13 years 4 months ago
2002
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
TPDS
1998
13 years 4 months ago
1998
—Instruction fetching is critical to the performance of a superscalar microprocessor. We develop a mathematical model for three different cache techniques and evaluate its perfor...
ISLPED
1999
ACM
13 years 9 months ago
1999
ACM
Modern microprocessors employ one or two levels of on-chip cachesto bridge the burgeoning speeddisparities between the processor and the RAM. These SRAM caches are a major source ...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...