25 search results - page 3 / 5 » Temperature Aware Scheduling for Embedded Processors |
CGO
2004
IEEE
13 years 9 months ago
2004
IEEE
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing ...
LCPC
2004
Springer
13 years 11 months ago
2004
Springer
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also cau...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
Utilizing on-chip caches in embedded multiprocessorsystem-on-a-chip (MPSoC) based systems is critical from both performance and power perspectives. While most of the prior work th...
DATE
2007
IEEE
14 years 3 days ago
2007
IEEE
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...