179 search results - page 2 / 36 » Temperature-aware global placement |
ASPDAC
2006
ACM
13 years 9 months ago
2006
ACM
Abstract-- In this paper, we present FastPlace 2.0
DAC
2003
ACM
14 years 6 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
The existence of non-uniform thermal gradients on the substrate in high performance IC’s can significantly impact the performance of global on-chip interconnects. This issue is...
ISPD
2012
ACM
12 years 25 days ago
2012
ACM
As technology scales and frequency increases, a new design style is emerging, referred to as hybrid designs, which contain a mixture of random logic and datapath standard cell com...