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» Temporal Logic Model Checking (Abstract)
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DATE
2009
IEEE
168views Hardware» more  DATE 2009»
14 years 16 days ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
ICFEM
2005
Springer
13 years 11 months ago
An Evidential Tool Bus
Abstract. Theorem provers, model checkers, static analyzers, test generators. . . all of these and many other kinds of formal methods tools can contribute to the analysis and devel...
John M. Rushby
ICTAC
2010
Springer
13 years 4 months ago
Preference and Non-deterministic Choice
Material Flow Abstraction of Manufacturing Systems. ‣Umberto Costa, Ivan de Medeiros Jr and Marcel Oliveira. Specification and Verification of a MPI Implementation for a MP-SoC...
Bill Stoddart, Frank Zeyda, Steve Dunne
CIE
2007
Springer
13 years 12 months ago
Computational Complexity of Constraint Satisfaction
Abstract. The input to a constraint satisfaction problem (CSP) consists of a set of variables, each with a domain, and constraints between these variables formulated by relations o...
Heribert Vollmer
DAGSTUHL
2007
13 years 7 months ago
Parallel universes to improve the diagnosis of cardiac arrhythmias
arrhythmias (extended abstract) Elisa Fromont, Ren´e Quiniou, Marie-Odile Cordier We are interested in using parallel universes to learn interpretable models that can be subseque...
Élisa Fromont, Rene Quiniou, Marie-Odile Co...