Sciweavers

37 search results - page 3 / 8
» Test Enrichment for Path Delay Faults Using Multiple Sets of...
Sort
View
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
13 years 10 months ago
Non-Enumerative Path Delay Fault Diagnosis
The first non-enumerative framework for diagnosing path delay faults using zero suppressed binary decision diagrams is introduced. We show that fault free path delay faults with ...
Saravanan Padmanaban, Spyros Tragoudas
ASPDAC
2004
ACM
102views Hardware» more  ASPDAC 2004»
13 years 11 months ago
TranGen: a SAT-based ATPG for path-oriented transition faults
— This paper presents a SAT-based ATPG tool targeting on a path-oriented transition fault model. Under this fault model, a transition fault is detected through the longest sensit...
Kai Yang, Kwang-Ting Cheng, Li-C. Wang
ET
2010
98views more  ET 2010»
13 years 4 months ago
MONSOON: SAT-Based ATPG for Path Delay Faults Using Multiple-Valued Logics
Abstract As technology scales down into the nanometer era, delay testing of modern chips has become more and more important. Tests for the path delay fault model are widely used to...
Stephan Eggersglüß, Görschwin Fey,...
ITC
2003
IEEE
120views Hardware» more  ITC 2003»
13 years 10 months ago
High Quality ATPG for Delay Defects
: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...
Puneet Gupta, Michael S. Hsiao
VTS
1999
IEEE
108views Hardware» more  VTS 1999»
13 years 9 months ago
Adaptive Techniques for Improving Delay Fault Diagnosis
This paper presents adaptive techniques for improving delay fault diagnosis. These techniques reduce the search space for direct probing which can save a lot of time during failur...
Jayabrata Ghosh-Dastidar, Nur A. Touba