Sciweavers

88 search results - page 2 / 18
» Test Selection Based on High Level Fault Simulation for Mixe...
Sort
View
JUCS
2008
168views more  JUCS 2008»
13 years 5 months ago
Online Network-on-Chip Switch Fault Detection and Diagnosis Using Functional Switch Faults
: This paper presents efficient methods for online fault detection and diagnosis of Network-on-Chip (NoC) switches. The fault model considered in this research is a system level fa...
Naghmeh Karimi, Armin Alaghi, Mahshid Sedghi, Zain...
VTS
1999
IEEE
106views Hardware» more  VTS 1999»
13 years 9 months ago
RT-level TPG Exploiting High-Level Synthesis Information
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto
HPCA
2009
IEEE
14 years 5 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
TSMC
2008
117views more  TSMC 2008»
13 years 3 months ago
Discovery of High-Level Behavior From Observation of Human Performance in a Strategic Game
This paper explores the issues faced in creating a sys-4 tem that can learn tactical human behavior merely by observing5 a human perform the behavior in a simulation. More specific...
Brian S. Stensrud, Avelino J. Gonzalez
COMPSAC
2005
IEEE
13 years 11 months ago
A Comparison of Network Level Fault Injection with Code Insertion
This paper describes our research into the application of fault injection to Simple Object Access Protocol (SOAP) based Service Oriented-Architectures (SOA). We show that our prev...
Nik Looker, Malcolm Munro, Jie Xu