Sciweavers

55 search results - page 3 / 11
» Test Strategies for Low Power Devices
Sort
View
DAC
2009
ACM
14 years 4 days ago
O-Router: an optical routing framework for low power on-chip silicon nano-photonic integration
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
Duo Ding, Yilin Zhang, Haiyu Huang, Ray T. Chen, D...
DT
2006
109views more  DT 2006»
13 years 5 months ago
Test Consideration for Nanometer-Scale CMOS Circuits
The ITRS (International Technology Roadmap for Semiconductors) predicts aggressive scaling down of device size, transistor threshold voltage and oxide thickness to meet growing de...
Kaushik Roy, T. M. Mak, Kwang-Ting (Tim) Cheng
JCP
2006
92views more  JCP 2006»
13 years 5 months ago
A Novel Pulse Echo Correlation Tool for Transmission Path Testing and Fault Diagnosis
Abstract-- In this paper a novel pulse sequence testing methodology is presented [22] as an alternative to Time Domain Reflectometry (TDR) for transmission line health condition mo...
David M. Horan, Richard A. Guinee
BROADNETS
2006
IEEE
13 years 11 months ago
SeeMote: In-Situ Visualization and Logging Device for Wireless Sensor Networks
In this paper we address three challenges that are present when building and analyzing wireless sensor networks (WSN) as part of ubiquitous computing environment: the need for an ...
Leo Selavo, Gang Zhou, John A. Stankovic
GLVLSI
2008
IEEE
204views VLSI» more  GLVLSI 2008»
13 years 11 months ago
NBTI resilient circuits using adaptive body biasing
Reliability has become a practical concern in today’s VLSI design with advanced technologies. In-situ sensors have been proposed for reliability monitoring to provide advance wa...
Zhenyu Qi, Mircea R. Stan