14 search results - page 2 / 3 » Test Wrapper and Test Access Mechanism Co-Optimization for S... |
ITC
2000
IEEE
13 years 9 months ago
2000
IEEE
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (T...
DAC
2008
ACM
14 years 5 months ago
2008
ACM
In modular testing of system-on-a-chip (SoC), test access mechanisms (TAMs) are used to transport test data between the input/output pins of the SoC and the cores under test. Prio...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Many SOCs today contain both digital and analog embedded cores. Even though the test cost for such mixed-signal SOCs is significantly higher than that for digital SOCs, most prio...
ICCD
2005
IEEE
14 years 1 months ago
2005
IEEE
The manufacturing test cost for mixed-signal SOCs is widely recognized to be much higher than that for digital SOCs. It has been shown in recent prior work that the use of analog ...