248 search results - page 3 / 50 » Test exploration and validation using transaction level mode... |
DATE
2006
IEEE
13 years 10 months ago
2006
IEEE
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
ECBS
2011
IEEE
12 years 4 months ago
2011
IEEE
Abstract—With the availability of the off-the-shelf quadrocopter platforms, the implementation of autonomous unmanned aerial vehicle (UAV) has substantially been simplified. Suc...
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper gives an overview of a transaction level modeling (TLM) design flow for straightforward embedded system design with SystemC. The goal is to systematically develop both...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
AIIDE
2007
13 years 7 months ago
2007
This paper proposes the use of an autonomous exploring agent to generate and annotate the waypoint graph as an offline process during level development. The explorer incrementally...