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ISCAS
1994
IEEE
93views Hardware» more  ISCAS 1994»
13 years 8 months ago
The Dynamic Locking Heuristic - A New Graph Partitioning Algorithm
In layout design nding e ciently good solutions to the hypergraph bipartitioning problem is of great importance. This paper introduces a new algorithm, the dynamic locking algorit...
Achim G. Hoffmann
GECCO
2003
Springer
132views Optimization» more  GECCO 2003»
13 years 9 months ago
Circuit Bipartitioning Using Genetic Algorithm
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...
Jong-Pil Kim, Byung Ro Moon
ICCAD
2001
IEEE
124views Hardware» more  ICCAD 2001»
14 years 1 months ago
Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs
Methods based on Boolean satisfiability (SAT) typically use a Conjunctive Normal Form (CNF) representation of the Boolean formula, and exploit the structure of the given problem ...
Aarti Gupta, Zijiang Yang, Pranav Ashar, Lintao Zh...
IPPS
2006
IEEE
13 years 10 months ago
Parallelizing post-placement timing optimization
This paper presents an efficient modeling scheme and a partitioning heuristic for parallelizing VLSI post-placement timing optimization. Encoding the paths with timing violations...
Jiyoun Kim, Marios C. Papaefthymiou, José N...
JPDC
1998
124views more  JPDC 1998»
13 years 4 months ago
Multilevel k-way Partitioning Scheme for Irregular Graphs
In this paper we present a parallel formulation of a multilevel k-way graph partitioning algorithm. A key feature of this parallel formulation is that it is able to achieve a high ...
George Karypis, Vipin Kumar