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» The Effectiveness of SRAM Network Caches in Clustered DSMs
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DSN
2005
IEEE
13 years 10 months ago
ReStore: Symptom Based Soft Error Detection in Microprocessors
Device scaling and large scale integration have led to growing concerns about soft errors in microprocessors. To date, in all but the most demanding applications, implementing par...
Nicholas J. Wang, Sanjay J. Patel
JUCS
2008
148views more  JUCS 2008»
13 years 4 months ago
An Optimization of CDN Using Efficient Load Distribution and RADS Caching Algorithm
: Nowadays, while large-sized multimedia objects are becoming very popular throughout the Internet, one of the important issues appears to be the acceleration of content delivery n...
Yun Ji Na, Sarvar R. Abdullaev, Franz I. S. Ko
ANCS
2009
ACM
13 years 2 months ago
Design and performance analysis of a DRAM-based statistics counter array architecture
The problem of maintaining efficiently a large number (say millions) of statistics counters that need to be updated at very high speeds (e.g. 40 Gb/s) has received considerable re...
Haiquan (Chuck) Zhao, Hao Wang, Bill Lin, Jun (Jim...
ICPP
2006
IEEE
13 years 11 months ago
Data Transfers between Processes in an SMP System: Performance Study and Application to MPI
— This paper focuses on the transfer of large data in SMP systems. Achieving good performance for intranode communication is critical for developing an efficient communication s...
Darius Buntinas, Guillaume Mercier, William Gropp
ICPPW
2000
IEEE
13 years 9 months ago
Challenges in URL Switching for Implementing Globally Distributed Web Sites
URL, or layer-5, switches can be used to implement locally and globally distributed web sites. URL switches must be able to exploit knowledge of server load and content (e.g., of ...
Zornitza Genova, Kenneth J. Christensen