237 search results - page 2 / 48 » The Energy Efficiency of IRAM Architectures |
ECCTD
2011
12 years 5 months ago
2011
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
TCAD
2002
13 years 5 months ago
2002
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
ICCAD
2010
IEEE
13 years 3 months ago
2010
IEEE
3D stacked circuits reduce communication delay in multicore system-on-chips (SoCs) and enable heterogeneous integration of cores, memories, sensors, and RF devices. However, vertic...
ISLPED
2010
ACM
13 years 3 months ago
2010
ACM
DRAM power and energy efficiency considerations are becoming increasingly important for low-power and mobile systems. Using lower power modes provided by commodity DRAM chips redu...
AISS
2010
13 years 24 days ago
2010
This paper has focused on the integration of Hybrid Renewable Energy, specifically the solar energy resources into conventional electric grid and deployment of smart architecture ...