27 search results - page 3 / 6 » The Memory Bandwidth Bottleneck and its Amelioration by a Co... |
ICCS
2005
Springer
13 years 11 months ago
2005
Springer
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
FCCM
2000
IEEE
13 years 10 months ago
2000
IEEE
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
SC
2004
ACM
13 years 11 months ago
2004
ACM
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
ISCA
1994
IEEE
13 years 9 months ago
1994
IEEE
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
DATE
2009
IEEE
14 years 7 days ago
2009
IEEE
Abstract—Convergence of communication, consumer applications and computing within mobile systems pushes memory requirements both in terms of size, bandwidth and power consumption...